From 190202583edb9dcab5ca49638169d08a332f0fdf Mon Sep 17 00:00:00 2001
From: Robert Marko <robert.marko@sartura.hr>
Date: Sun, 2 Nov 2025 16:57:45 +0100
Subject: [PATCH] microchip: lan969x: add Novarq Tactical 1000 v3

Add support for Novarq Tactical 1000 v3 board as a separate platform since
it uses 2GB of RAM and requires a different RAM configuration.

Signed-off-by: Robert Marko <robert.marko@sartura.hr>
---
 .../fdts/lan969x-tactical-1000-v3-ddr.dtsi    | 90 +++++++++++++++++++
 .../novarq_tactical_1000_v3_tb_fw_config.dts  | 30 +++++++
 .../novarq_tactical_1000_v3/platform.mk       | 12 +++
 scripts/fwu/fwu.js                            |  2 +-
 4 files changed, 133 insertions(+), 1 deletion(-)
 create mode 100644 plat/microchip/lan969x/fdts/lan969x-tactical-1000-v3-ddr.dtsi
 create mode 100644 plat/microchip/lan969x/novarq_tactical_1000_v3/fdts/novarq_tactical_1000_v3_tb_fw_config.dts
 create mode 100644 plat/microchip/lan969x/novarq_tactical_1000_v3/platform.mk

--- /dev/null
+++ b/plat/microchip/lan969x/fdts/lan969x-tactical-1000-v3-ddr.dtsi
@@ -0,0 +1,90 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2022 Microchip Technology Inc. and its subsidiaries.
+ *
+ */
+
+&ddr {
+	microchip,mem-name = "lan969x_tactical_1000_2gb 2025-11-02-13:03:23 7391dfb-dirty";
+	microchip,mem-speed = <2400>;
+	microchip,mem-size = <0x80000000>;
+	microchip,mem-bus-width = <16>;
+
+	microchip,main-reg = <
+		0x00001091	/* crcparctl1 */
+		0x00000001	/* dbictl */
+		0x00000040	/* dfimisc */
+		0x0391820f	/* dfitmg0 */
+		0x00040201	/* dfitmg1 */
+		0x40400003	/* dfiupd0 */
+		0x004000ff	/* dfiupd1 */
+		0x003f7f40	/* ecccfg0 */
+		0x00020248	/* init0 */
+		0x00e80000	/* init1 */
+		0x0c340101	/* init3 */
+		0x10180200	/* init4 */
+		0x00110000	/* init5 */
+		0x00000402	/* init6 */
+		0x00000c19	/* init7 */
+		0x81040010	/* mstr */
+		0x00000000	/* pccfg */
+		0x00000000	/* pwrctl */
+		0x00210020	/* rfshctl0 */
+		0x00000000	/* rfshctl3 */
+	>;
+
+	microchip,timing-reg = <
+		0x17131413	/* dramtmg0 */
+		0x0007051b	/* dramtmg1 */
+		0x1a000010	/* dramtmg12 */
+		0x090b0512	/* dramtmg2 */
+		0x0000400c	/* dramtmg3 */
+		0x08040409	/* dramtmg4 */
+		0x07070404	/* dramtmg5 */
+		0x07060c0b	/* dramtmg8 */
+		0x0003040d	/* dramtmg9 */
+		0x07000610	/* odtcfg */
+		0x0049014b	/* rfshtmg */
+	>;
+
+	microchip,mapping-reg = <
+		0x0000001f	/* addrmap0 */
+		0x003f0909	/* addrmap1 */
+		0x00000700	/* addrmap2 */
+		0x00000000	/* addrmap3 */
+		0x00001f1f	/* addrmap4 */
+		0x07070707	/* addrmap5 */
+		0x07070707	/* addrmap6 */
+		0x00000f07	/* addrmap7 */
+		0x00003f01	/* addrmap8 */
+	>;
+
+	microchip,phy-reg = <
+		0x0000040c	/* dcr */
+		0x0064401b	/* dsgcr */
+		0x8000b0cf	/* dtcr0 */
+		0x00010a37	/* dtcr1 */
+		0x00c01884	/* dxccr */
+		0x000010ba	/* pgcr2 */
+		0x00000000	/* schcr1 */
+		0x00079900	/* zq0pr */
+		0x10077900	/* zq1pr */
+		0x00000000	/* zq2pr */
+		0x00058f00	/* zqcr */
+	>;
+
+	microchip,phy_timing-reg = <
+		0x0827100a	/* dtpr0 */
+		0x28250018	/* dtpr1 */
+		0x000702a1	/* dtpr2 */
+		0x03000101	/* dtpr3 */
+		0x02950808	/* dtpr4 */
+		0x00361009	/* dtpr5 */
+		0x4ae25710	/* ptr0 */
+		0x74f4950e	/* ptr1 */
+		0x00083def	/* ptr2 */
+		0x2a192000	/* ptr3 */
+		0x1003a000	/* ptr4 */
+	>;
+
+};
--- /dev/null
+++ b/plat/microchip/lan969x/novarq_tactical_1000_v3/fdts/novarq_tactical_1000_v3_tb_fw_config.dts
@@ -0,0 +1,30 @@
+/*
+ * Copyright (c) 2022, Microchip Technology Inc. and its subsidiaries.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/dts-v1/;
+
+#include "lan969x.dtsi"
+#include "lan969x-tactical-1000-v3-ddr.dtsi"
+
+&emmc_clk {
+	clock-frequency = <100000000>;
+};
+
+&sdmmc0 {
+	status = "okay";
+	bus-width = <8>;
+};
+
+&qspi0 {
+	status = "okay";
+	spi-flash@0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <100000000>;
+		spi-tx-bus-width = <4>;
+		spi-rx-bus-width = <4>;
+	};
+};
--- /dev/null
+++ b/plat/microchip/lan969x/novarq_tactical_1000_v3/platform.mk
@@ -0,0 +1,12 @@
+#
+# Copyright (c) 2021, Microchip Technology Inc. and its subsidiaries.
+#
+# SPDX-License-Identifier: BSD-3-Clause
+#
+
+include plat/microchip/lan969x/common/common.mk
+
+# This is used in lan969x code
+$(eval $(call add_define,LAN969X_ASIC))
+# This is used in common drivers
+$(eval $(call add_define,LAN966X_ASIC))
--- a/scripts/fwu/fwu.js
+++ b/scripts/fwu/fwu.js
@@ -91,7 +91,7 @@ const platforms = [
 	"ddr_diag":	ddr_diag_regs_lan969x,
 	"ddr_regs":	ddr_regs_lan969x,
 	"ddr_speed":	lan969x_speeds,
-	"bl2u_compat":	["lan969x_a0", "lan969x_svb"],
+	"bl2u_compat":	["lan969x_a0", "lan969x_svb", "novarq_tactical_1000_v3"],
     },
 ];
 
